Hacarus COLIGO is an edge AI platform which provides customers with a wide range of applications and services. It works with minimal effort for set-up and unlike deep learning based solutions, COLIGO does not need an external training cycle or manual installation of pre-trained models. It supports both time series data and image data, and training & inference runs within the chip – without the need for external cloud connection. COLIGO CORE for Intel® FPGA includes an implementation of HACRUS’ propriety Sparse Coding algorithm for all Intel Arria® 10 FPGA boards with access to DDR Memory. The SC algorithm generates a sparse representation (i.e. sparse code) of an input data, which when used together with a preset dictionary enables data reconstruction. Necessary access to external memory is provided through an Avalon® MM interface. Having taken advantage of the pipeline-parallel execution approach with the Intel® HLS (High Level Synthesis) compiler, boost in performance is realized.
*Please note that member solutions are often customizable to meet the needs of individual enterprise end users.CONTACT COMPANY► CONTACT INTEL ACCOUNT MGR►
- Sparse Modeling Platform
Sparse Modeling Platform is highly lightweight and resource efficient and can be embedded into more or less any edge device